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CY7C187A
64K x 1 Static RAM
Features
* High speed -- 20 ns * CMOS for optimum speed/power * Low active power -- 495 mW * Low standby power -- 220 mW * TTl-compatible inputs and outputs * Automatic power-down when deselected provided by an active LOW chip enable (CE) and three-state drivers. The CY7C187A has an automatic power-down feature, reducing the power consumption by 55% when deselected. Writing to the device is accomplished when the chip enable (CE) and write enable (WE) inputs are both LOW. Data on the input pin (DI) is written into the memory location specified on the address pins (A0 through A 15). Reading the device is accomplished by taking the chip enable (CE) LOW, while write enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the data output (DO) pin. The output pin stays in high-impedance state when chip enable (CE) is HIGH or write enable (WE) is LOW. The 7C187A utilizes a die coat to insure alpha immunity.
Functional Description
The CY7C187A is a high-performance CMOS static RAM organized as 65,536 words by 1 bit. Easy memory expansion is
Logic Block Diagram
Pin Configurations
DIP Top View
A0 A1 A2 A3 A4 A5 A6 A7 DOUT WE GND 1 22 2 21 3 20 4 19 5 18 6 7C187A 17 16 7 15 8 14 9 13 10 11 12 VCC A15 A14 A13 A12 A11 A10 A9 A8 DIN CE C187A-2
DI
INPUT BUFFER
CE
COLUMN DECODER POWER DOWN
WE A4 A5 A6 A7 A8 A9 A10 A11
C187A-1
DOUT
A2 A3 A4 A5 A6 A7
3 4 5 6 7 8 9
2 1 22 21 20 19 18 7C187A 17 16 15 14 1011 12 13 WE GND CE D IN
A1 A0 VCC A15 A14 A13 A12 A11 A10 A9 A8 C187A-3
A12 A13 A14 A15 A0 A1 A2 A3
ROW DECODER
256 x 256 ARRAY
SENSE AMPS
DO LCC Top View
Selection Guide[1]
7C187A-15 Maximum Access Time (ns) Maximum Operating Current (mA) Maximum Standby Current (mA) Military Military 15 160 40/20 7C187A-20 20 90 40/20 7C187A-25 25 80 40/20 7C187A-35 35 80 30/20
Shaded area contains preliminary information. Notes: 1. For commercial specifications, see CY7C187 datasheet.
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose
*
CA 95134 * 408-943-2600 May 1986 - Revised March 1995
CY7C187A
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ..................................-65C to+150C Ambient Temperature with Power Applied ..............................................-55C to+125C Supply Voltage to Ground Potential (Pin 22 to Pin 11) ............................................ -0.5V to+7.0V DC Voltage Applied to Outputs in High Z State[2] ............................................. -0.5V to+7.0V DC Input Voltage[2] .........................................-0.5V to +7.0V Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Latch-Up Current..................................................... >200 mA
Operating Range
Range Military[3] Ambient Temperature -55C to +125C VCC 5V 10%
Electrical Characteristics Over the Operating Range[4]
7C187A-15 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Output Leakage Current Output Short Circuit Current[5] VCC Operating Supply Current Automatic CE PowerDown Current[6] Automatic CE PowerDown Current[6]
[2]
7C187A-20 Min. 2.4 Max. 0.4 2.2 -0.5 -5 -5 VCC 0.8 +5 +5 -350 90 40 20 Unit V V V V A A mA mA mA mA
Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL =12.0 mA Mil
Min. 2.4
Max. 0.4
2.2 -0.5 GND VI V CC GND VO VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Max. VCC, CE VIH Max. VCC, CE VCC - 0.3V, VIN V CC - 0.3V or VIN 0.3V Mil Mil Mil -5 -5
VCC 0.8 +5 +5 -350 160 40 20
Shaded area contains preliminary information.
Notes: 2. VIL (min.) = -3.0V for pulse durations less than 30 ns. 3. TA is the "instant on" case temperature. 4. See the last page of this specification for Group A subgroup testing information. 5. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. 6. A pull-up resistor to VCC on the CE input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given.
2
CY7C187A
Electrical Characteristics Over the Operating Range[4] (continued)
7C187A-25 Parameter VOH VOL VIH VIL IIX IOZ IOS ICC ISB1 ISB2 Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage
[2]
7C187A-35 Min. 2.4 Max. 0.4 2.2 -3.0 -5 -5 VCC 0.8 +5 +5 -350 80 30 20 Unit V V V V A A mA mA mA mA
Test Conditions VCC = Min., IOH = -4.0 mA VCC = Min., IOL =8.0 mA Mil
Min. 2.4
Max. 0.4
2.2 -3.0 GND < V I < V CC GND < VO < VCC, Output Disabled VCC = Max., VOUT = GND VCC = Max., IOUT = 0 mA Max. VCC, CE > VIH Max. VCC, CE > VCC - 0.3V, VIN > VCC - 0.3V or VIN < 0.3V Mil Mil Mil -5 -5
VCC 0.8 +5 +5 -350 80 40 20
Input Load Current Output Leakage Current Output Short Circuit Current[5] VCC Operating Supply Current Automatic CE Power-Down Current[6] Automatic CE Power-Down Current[6]
Capacitance[7]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF
Note: 7. Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
R1 481 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 255 5V OUTPUT 5 pF INCLUDING JIG AND SCOPE R2 255 R1 481 ALL INPUT PULSES 3.0V 10% GND 5 ns 5 ns
C187A-5
90%
90% 10%
(a)
(b)
C187A-4
Equivalent to:
THEVENIN EQUIVALENT 167 OUTPUT 1.73V
3
CY7C187A
Switching Characteristics Over the Operating Range[4, 8]
7C187A-15 Parameter READ CYCLE tRC tAA tOHA tACE tLZCE tHZCE tPU tPD WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tSD tHD tLZWE tHZWE Read Cycle Time Address to Data Valid Output Hold from Address Change CE LOW to Data Valid CE LOW to Low Z
[9]
7C187A-20 Min. 20 Max.
7C187A-25 Min. 25 Max.
7C187A-35 Min. 35 Max. Unit ns 35 3 ns ns 35 5 15 0 20 25 25 25 0 0 20 15 0 5 ns ns ns ns ns ns ns ns ns ns ns ns ns ns 10 ns
Description
Min. 15
Max.
15 3 15 3 8 0 15 15 10 10 0 0 10 7 0 3 7 20 15 15 0 0 15 10 0 5 0 5 3
20 3 20 5 8 0 20 20 20 20 0 0 15 10 0 5 7
25
25 10 20
CE HIGH toHigh Z[9,10] CE LOW to Power-Up CE HIGH to Power-Down
[11]
Write Cycle Time CE LOW to Write End Address Set-Up to Write End Address Hold from Write End Address Set-Up to Write Start WE Pulse Width Data Set-Up to Write End Data Hold from Write End WE HIGH to Low Z WE LOW to High Z
[9] [9,10]
7
Shaded area contains preliminary information. Notes: 8. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified I OL/IOH and 30-pF load capacitance. 9. At any given temperature and voltage condition, tHZCE is less than tLZCE for any given device. 10. t HZCE and t HZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady-state voltage. 11. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
4
CY7C187A
Switching Waveforms
Read Cycle No. 1[12,13]
tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID
C187A-6
Read Cycle No.2[12,14]
CE tACE tLZCE DATA OUT HIGH IMPEDANCE
tRC
tHZCE DATA VALID tPD
HIGH IMPEDANCE
VCC SUPPLY CURRENT
tPU 50%
ICC 50% ISB
C187A-7
Write Cycle No.1 (WE Controlled)[11]
tWC ADDRESS tSCE CE tSA WE tSD DATA IN DATAIN VALID tHZWE DATA OUT DATA UNDEFINED
C187A-8
tAW tPWE
tHA
tHD
tLZWE HIGH IMPEDANCE
Notes: 12. WE is HIGH for read cycle. 13. Device is continuously selected, CE = VIL. 14. Address valid prior to or coincident with CE transition LOW.
5
CY7C187A
Switching Waveforms (Continued)
Write Cycle No.2 (CE Controlled)[11,15]
tWC ADDRESS tSA CE tAW tPWE WE tSD DATA IN DATAIN VALID tHD tHA tSCE
DATA OUT
HIGH IMPEDANCE
C187A-9
Note: 15. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
Typical DC and AC Characteristics
OUTPUT SOURCE CURRENT (mA) NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.4 NORMALIZED I CC, I SB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 4.0 4.5 5.0 ISB 5.5 6.0 ICC NORMALIZED I CC, I SB 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -55 ISB 25 125 VCC =5.0V VIN =5.0V ICC NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC =5.0V TA =25C
SUPPLY VOLTAGE(V)
AMBIENT TEMPERATURE (C)
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT (mA)
NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.4 NORMALIZED t AA NORMALIZED t AA 1.3 1.2 1.1 TA =25C 1.0 0.9 0.8 4.0 4.5 5.0 5.5 6.0 1.6 1.4 1.2 1.0
NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE
OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 80 60 40 20 0 0.0 1.0 2.0 3.0 4.0 VCC =5.0V TA =25C
VCC =5.0V 0.8 0.6 -55
25
125
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (C)
OUTPUT VOLTAGE (V)
6
CY7C187A
Typical DC and AC Characteristics
TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 NORMALIZED I PO 2.5 DELTA tAA (ns) 2.0 1.5 1.0 0.5 0.0 0.0 1.0 2.0 3.0 4.0 5.0 30.0 NORMALIZED I CC 25.0 20.0 15.0 10.0 5.0 0.0 0 200 400 VCC =4.5V TA =25C TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 1.25 VCC =5.0V TA =25C VCC =0.5V 1.00 NORMALIZED I CC vs. CYCLE TIME
0.75
600
800 1000
0.50 10
20
30
40
SUPPLY VOLTAGE (V)
CAPACITANCE (pF)
CYCLE FREQUENCY (MHz)
Address Designators
Address Name A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 Address Function X3 X4 X5 X6 X7 Y7 Y6 Y2 Y3 Y1 Y0 Y4 Y5 X0 X1 X2 Pin Number 1 2 3 4 5 6 7 8 14 15 16 17 18 19 20 21
Truth Table
CE H L L WE X H L Input/Output High Z Data Out Data In Read Write Mode Deselect/Power-Down
7
CY7C187A
Ordering Information
Speed (ns) 15 20 25 35 Ordering Code CY7C187A-15DMB CY7C187A-15LMB CY7C187A-20DMB CY7C187A-20LMB CY7C187A-25DMB CY7C187A-25LMB CY7C187A-35DMB CY7C187A-35LMB
Shaded area contains preliminary information.
Package Name D14 L52 D14 L52 D14 L52 D14 L52
Package Type 24-Lead (300-Mil) CerDIP 22-Pin Rectangular Leadless Chip Carrier 24-Lead (300-Mil) CerDIP 22-Pin Rectangular Leadless Chip Carrier 24-Lead (300-Mil) CerDIP 22-Pin Rectangular Leadless Chip Carrier 24-Lead (300-Mil) CerDIP 22-Pin Rectangular Leadless Chip Carrier
Operating Range Military Military Military Military
MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics
Parameter VOH VOL VIH VIL Max. IIX IOZ IOS ICC ISB1 ISB2 Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 tRC tAA tOHA tACE WRITE CYCLE tWC tSCE tAW tHA tSA tPWE tSD tHD 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
Switching Characteristics
Parameter READ CYCLE 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 Subgroups
Document #: 38-00115-D
8
CY7C187A
Package Diagrams
24-Lead (300-Mil) CerDIP D14
MIL-STD-1835 D- 9 Config.A
22-Pin Rectangular Leadless Chip Carrier L52
(c) Cypress Semiconductor Corporation, 1996. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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